It will be appreciated by those skilled in the art that in order to use an integrated circuit chip, it is necessary to make electrical connection to the integrated circuit incorporated within the chip. These connections are made through contact pads located at one main face (hereinafter called the interconnect face) of the chip. Frequently, it is desired to mount the chip on an etched circuit board (ECB) and to establish electrical connection between the contact pads of the chip and circuit runs of the ECB, so as to connect the integrated circuit to other components mounted on the ECB.
As integrated circuits become more complex, in terms of both density of interconnections and number of connections, it is increasingly necessary to pay attention to factors other than the ohmic performance of the connections between the chip and the circuit board. For example, one reason for reducing the size of an integrated circuit is in order to keep path lengths short and avoid degradation of high frequency signals. When the input and output signals of the integrated circuit are low frequency signals, it is not necessary to pay a great deal of attention to the electrical characteristics of the interconnections between the chip and the circuit board, but as signal frequency increases the demands that are placed on the interconnections in order to avoid degradation of the signal become more severe. One electrical connector that is able to transmit high frequency signals without undue degradation is described in U.S. Pat. No. 4,255,003 issued Mar. 10, 1981. In the case of that connector, the chip is mounted on a ceramic substrate that has conductor runs extending from the contact pads of the chip to the periphery of the substrate. The substrate is fitted in a recess in the circuit board, and the conductor runs at the periphery of the substrate align with corresponding conductor runs on the upper surface of the board. A frame-like pressure pad of elastomer, and having conductive fingers on its lower surface, is fitted so that it bridges the gap between the ceramic substrate and the circuit board and the conductive fingers establish connection between the conductive circuit runs of the substrate and the corresponding circuit runs of the circuit board. A frame member is fitted over the pressure pad and is secured to the board, compressing the elastomer so that contact force is provided for maintaining the conductive fingers in contact with the circuit runs. This type of connector has been used successfully with signals at frequencies of up to 10 GHz.
Other problems that present themselves with more complex integrated circuits include problems of heat dissipation and of packaging cost. One method or reducing packaging cost by automation is known as tape automated bonding (TAB). TAB is generally used to establish connections between the contact pads of an integrated circuit chip and conductor runs of a ceramic substrate. See, for example, R. L. Cain, "Beam Tape Carriers-A Design Guide", Solid State Technology, Mar. 1978. Tape automated bonding employs a tape formed from a large number of like interconnect members. Each interconnect member typically comprises a sheet of dielectric material, such as polyimide, and conductor runs that extend over one face of the sheet. The sheet of dielectric material defines a window and the ends of the conductor runs, which are typically of copper, extend as beams into the space defined by the window. Hence, the tape is referred to as beam tape. The window is somewhat larger than the interconnect face of the chip. The tape is fed to a bonding station, at which the interconnect faces of respective chips are presented to the windows of respective interconnect members, and the contact pads of each chip are thermocompression bonded to the beams of the corresponding conductor runs. The tape is severed into individual lengths, corresponding to the respective interconnect members, and the chip is attached to the ceramic substrate. The outer ends of the conductor runs are bonded to the conductor runs of the ceramic substrate.
The many areas in which problems can arise make it necessary to view the packaging of an integrated circuit chip on a system level. It is not sufficient simply to provide the chip with accessible leads. The manner in which the leads will be connected to other elements, and the effect that operation of the circuit will have on other elements, must also be considered.